Resolução paralela verificada de sistemas de equações lineares : uma abordagem para eficiência energética utilizando DVFS

Abstract

Solving Systems of Linear Equations is important in several domains. In many cases, it is necessary to employ verified computing to achieve reliable results. With the support of High Performance Computing (HPC), solve efficiently huge linear systems with Verified Computing has become possible. Recently, HPC researchers have started to investigate solutions focused not only in performance but also in energy efficiency as well. In this context, the main goal of this work is to propose the use of DVFS (Dynamic Voltage and Frequency Scaling) technique to change the CPU frequency during the execution of a solver that employs Verified Computing. Furthermore, this works intends to present a case study aiming at verifying if the use of DVFS can provide a reduction on energy consumption without perfomance and accuracy being compromised. Initially, a study about the FastPILSS solver was carried out to evaluate its accuracy, performance and energy consumption over several different input matrices. After that, we observed that the use of DVFS does not affect accuracy. Analysing the results, no reduction in energy consumption using the powersave governor was observed if compared to the energy consumption using the performance governor. This occurs due to the significant increase in execution time. When the frequency was changed in isolated steps of the solver algorithm, it was possible to reduce up to 3,29% the energy consumption for dense matrices during the approximate inverse calculation.